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专利名称：Phase interpolation circuit发明人：Chen-Chih Huang,Pao-Cheng Chiu申请号：US10773450申请日：20041202公开号：US07466179B2公开日：20081216
专利附图：
摘要：The invention relates to a phase-interpolation circuit and a phase-interpolationsignal generating circuit applying the phase-interpolation circuit. The phase-interpolationcircuit can avoid short-circuit current effectively. In addition, an inter-phase signal can beinterpolated between the rising edge and the falling edge of the clock pulse. The phase-
interpolation signal generating device can generate multiphase clock signals which notonly have linearly distributed phases but also maintain good 50% duty cycle of themultiphase clock signals.
申请人：Chen-Chih Huang,Pao-Cheng Chiu
地址：Hsinchu TW,Hsinchu TW
国籍：TW,TW
代理机构：Rabin & Berdo, P.C.
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