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Method of fabricating a high-voltage field-effect

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专利名称:Method of fabricating a high-voltage field-effect transistor

发明人:Rumennik, Vladimir,Disney, Donald R.,Ajit,

Janardhanan S.

申请号:EP10182706.1申请日:20000131公开号:EP22772B1公开日:20170712

摘要:A method for making a high voltage insulated gate field-effect transistor havinga source region (14) and a drain region (19,17) comprises the steps of forming the drainregion with an extended well region (17) having a buried layer (18) of opposite

conduction type implanted therein. The buried layer creates an associated pair of parallelJFET conduction channels (24,25) in the well region. A minimal number of processingsteps are required to form the parallel JFET conduction channels which provide the field-effect transistor with a low on-state resistance.

申请人:POWER INTEGRATIONS INC

地址:US

国籍:US

代理机构:Conroy, John

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