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Fabrication methodology for optoelectronic integra

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专利内容由知识产权出版社提供

专利名称:Fabrication methodology for optoelectronic

integrated circuits

发明人:Geoff W. Taylor申请号:US147394申请日:20150611公开号:US09450124B1公开日:20160920

专利附图:

摘要:A method of forming an integrated circuit employs a plurality of layerssupported on a substrate that include i) n-type contact layer, ii) a p-type modulationdoped quantum well structure (MDQWS) above the n-type contact layer, iii) n-type

MDQWS above the p-type MDQWS, and iv) p-type contact layer(s) above the n-typeMDQWS. A feature for a thyristor is defined by a mesa at the p-type contact layer of iv). Afirst layer of metal is deposited on the feature, which is then etched for at least oneother device. Additional layer(s) of metal is deposited on the feature to form cumulativemetal layers, which are etched away to form a set of mesas and correspondingelectrodes for the thyristor. The cumulative metal layers that cover the feature andcontact the mesa at the p-type contact layer of iv) are patterned to form an anodeelectrode of the thyristor.

申请人:Opel Solar, Inc.,The University of Connecticut

地址:Storrs Mansfield CT US,Farmington CT US

国籍:US,US

代理机构:Sughrue Mion, PLLC

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