DM74LS373

Revised March 2000

DM74LS373 • DM74LS374

3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops

General Description

These 8-bit registers feature totem-pole 3-STATE outputsdesigned specifically for driving highly-capacitive or rela-tively low-impedance loads. The high-impedance state andincreased high-logic level drive provide these registers withthe capability of being connected directly to and driving thebus lines in a bus-organized system without need for inter-face or pull-up components. They are particularly attractivefor implementing buffer registers, I/O ports, bidirectionalbus drivers, and working registers.

The eight latches of the DM74LS373 are transparent D-type latches meaning that while the enable (G) is HIGH theQ outputs will follow the data (D) inputs. When the enableis taken LOW the output will be latched at the level of thedata that was set up.

The eight flip-flops of the DM74LS374 are edge-triggeredD-type flip flops. On the positive transition of the clock, theQ outputs will be set to the logic states that were set up atthe D inputs.

A buffered output control input can be used to place theeight outputs in either a normal logic state (HIGH or LOWlogic levels) or a high-impedance state. In the high-imped-ance state the outputs neither load nor drive the bus linessignificantly.

The output control does not affect the internal operation ofthe latches or flip-flops. That is, the old data can beretained or new data can be entered even while the outputsare OFF.

Features

sChoice of 8 latches or 8 D-type flip-flops in a singlepackages3-STATE bus-driving outputssFull parallel-access for loadingsBuffered control inputs

sP-N-P inputs reduce D-C loading on data lines

Ordering Code:

Order NumberDM74LS373WMDM74LS373SJDM74LS373NDM74LS374WMDM74LS374SJIDM29901NC

Package Number

M20BM20DN20AM20BM20DN20A

Package Description

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

© 2000 Fairchild Semiconductor CorporationDS0031www.fairchildsemi.com

DM74LS373 • DM74LS374Connection Diagrams

DM74LS373

DM74LS374

Function Tables

DM74LS373

OutputControl

LLLH

H = HIGH Level (Steady State)

DM74LS374

DHLXX

OutputHLQ0Z

X = Don’t Care

EnableGHHLX

OutputControl

LLLH

Clock↑↑LX

DHLXX

OutputHLQ0Z

L = LOW Level (Steady State)Z = High Impedance State

↑ = Transition from LOW-to-HIGH levelQ0 = The level of the output before steady-state input conditions were established.

Logic Diagrams

DM74LS373

Transparent Latches

DM74LS374

Positive-Edge-Triggered Flip-Flops

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DM74LS373 • DM74LS374Absolute Maximum Ratings(Note 1)

Supply VoltageInput Voltage

Storage Temperature Range

Operating Free Air Temperature Range

7V7V

−65°C to +150°C

0°C to +70°C

Note 1: The “Absolute Maximum Ratings” are those values beyond whichthe safety of the device cannot be guaranteed. The device should not beoperated at these limits. The parametric values defined in the ElectricalCharacteristics tables are not guaranteed at the absolute maximum ratings.The “Recommended Operating Conditions” table will define the conditionsfor actual device operation.

DM74LS373 Recommended Operating Conditions

SymbolVCCVIHVILIOHIOLtWtSUtHTA

Supply VoltageHIGH Level Input VoltageLOW Level Input VoltageHIGH Level Output CurrentLOW Level Output CurrentPulse Width(Note 3)

Enable HIGHEnable LOW15155↓20↓0

70

Parameter

Min4.752

0.8−2.624

Nom5Max5.25UnitsVVVmAmAnsnsns°C

Data Setup Time (Note 2) (Note 3)Data Hold Time (Note 2) (Note 3)Free Air Operating Temperature

Note 2: The symbol (↓) indicates the falling edge of the clock pulse is used for reference.Note 3: TA = 25°C and VCC = 5V.

DM74LS373 Electrical Characteristics

over recommended operating free air temperature range (unless otherwise noted)SymbolVIVOHVOL

Parameter

Input Clamp VoltageHIGH Level Output VoltageOutput Voltage

IIIIHIILIOZHIOZLIOSICC

Input Current @ Max Input VoltageHIGH Level Input CurrentLOW Level Input CurrentOff-State Output Current withHIGH Level Output Voltage AppliedOff-State Output Current withLOW Level Output Voltage AppliedShort Circuit Output CurrentSupply Current

Conditions

VCC = Min, II = −18 mAVCC = Min, IOH = MaxVIL = Max, VIH = MinVIL = Max, VIH = MinIOL = 12 mA, VCC = MinVCC = Max, VI = 7VVCC = Max, VI = 2.7VVCC = Max, VI = 0.4VVCC = Max, VO = 2.7VVIH = Min, VIL = MaxVCC = Max, VO = 0.4VVIH = Min, VIL = MaxVCC = Max (Note 5)VCC = Max, OC = 4.5V,Dn, Enable = GND

Note 4: All typicals are at VCC = 5V, TA = 25°C.

Note 5: Not more than one output should be shorted at a time, and the duration should not exceed one second.

Min

Typ(Note 4)

Max−1.5

UnitsVV

2.43.1

LOW Level VCC = Min, IOL = Max

0.35

0.50.40.120−0.420−20

−50

24

−22540

mAµAmAµAµAmAmAV

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DM74LS373 • DM74LS374DM74LS373 Switching Characteristics

at VCC = 5V and TA = 25°C

RL = 667Ω

SymboltPLHtPHLtPLHtPHLtPZHtPZLtPHZtPLZ

Parameter

Propagation Delay TimeLOW-to-HIGH Level OutputPropagation Delay TimeHIGH-to-LOW Level OutputPropagation Delay TimeLOW-to-HIGH Level OutputPropagation Delay TimeHIGH-to-LOW Level OutputOutput Enable Timeto HIGH Level OutputOutput Enable Time to LOW Level OutputOutput Disable Time

from HIGH Level Output (Note 6)Output Disable Time

from LOW Level Output (Note 6)

Note 6: CL = 5 pF.

From (Input)To (Output)Data to QData to QEnable to QEnable to QOutput Control to Any QOutput Control to Any QOutput Control to Any QOutput Control to Any Q

CL = 45 pFMin

Max1818303028362025

CL = 150 pFMin

Max262738363650

Units

nsnsnsnsnsnsnsns

DM74LS374 Recommended Operating Conditions

SymbolVCCVIHVILIOHIOLtWtSUtHTA

Supply Voltage

HIGH Level Input VoltageLOW Level Input VoltageHIGH Level Output CurrentLOW Level Output CurrentPulse Width(Note 8)

Clock HIGHClock LOW

151520↑1↑0

70

Parameter

Min4.752

0.8−2.624

Nom5

Max5.25

UnitsVVVmAmAnsnsns°C

Data Setup Time (Note 7) (Note 8)Data Hold Time (Note 7) (Note 8)Free Air Operating Temperature

Note 7: The symbol (↑) indicates the rising edge of the clock pulse is used for reference.Note 8: TA = 25°C and VCC = 5V.

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DM74LS373 • DM74LS374DM74LS374 Electrical Characteristics

over recommended operating free air temperature range (unless otherwise noted)SymbolVIVOHVOL

Parameter

Input Clamp VoltageHIGH Level Output VoltageOutput Voltage

IIIIHIILIOZHIOZLIOSICC

Input Current @ Max Input VoltageHIGH Level Input CurrentLOW Level Input CurrentOff-State Output Current withHIGH Level Output Voltage AppliedOff-State Output Current withLOW Level Output Voltage AppliedShort Circuit Output CurrentSupply Current

Conditions

VCC = Min, II = −18 mAVCC = Min, IOH = MaxVIL = Max, VIH = MinVIL = Max, VIH = MinIOL = 12 mA, VCC = MinVCC = Max, VI = 7VVCC = Max, VI = 2.7VVCC = Max, VI = 0.4VVCC = Max, VO = 2.7VVIH = Min, VIL = MaxVCC = Max, VO = 0.4VVIH = Min, VIL = MaxVCC = Max (Note 10)

VCC = Max, Dn = GND, OC = 4.5V

−50

27

2.4

3.10.350.25

0.50.40.120−0.420−20−22545

mAµAmAµAµAmAmA

Min

Typ(Note 9)

Max−1.5

UnitsVV

LOW Level VCC = Min, IOL = Max

V

Note 9: All typicals are at VCC = 5V, TA = 25°C.

Note 10: Not more than one output should be shorted at a time, and the duration should not exceed one second.

DM74LS374 Switching Characteristics

at VCC = 5V and TA = 25°C

RL = 667Ω

SymbolfMAXtPLHtPHLtPZHtPZLtPHZtPLZ

Maximum Clock FrequencyPropagation Delay TimeLOW-to-HIGH Level OutputPropagation Delay TimeHIGH-to-LOW Level OutputOutput Enable Timeto HIGH Level OutputOutput Enable Timeto LOW Level OutputOutput Disable Time

from HIGH Level Output (Note 11)Output Disable Time

from LOW Level Output (Note 11)

Note 11: CL = 5 pF.

ParameterCL = 45 pFMin35

282828282025Max

CL = 150 pFMin20

32384444Max

UnitsMHznsnsnsnsnsns

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DM74LS373 • DM74LS374Physical Dimensions inches (millimeters) unless otherwise noted

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

Package Number M20B

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DM74LS373 • DM74LS374Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M20D

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DM74LS373 • DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-FlopsPhysical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N20A

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied andFairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILDSEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systemswhich, (a) are intended for surgical implant into thebody, or (b) support or sustain life, and (c) whose failureto perform when properly used in accordance withinstructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to theuser.www.fairchildsemi.com

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2.A critical component in any component of a life supportdevice or system whose failure to perform can be rea-sonably expected to cause the failure of the life supportdevice or system, or to affect its safety or effectiveness.

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