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White Electronic Designs2x512Kx8 DUALITHIC™ SRAM
FEATURES
Access Times 17, 20, 25, 35, 45, 55nsRevolutionary, Center Power/Ground Pinout
• 32 pin, Her met ic Ceramic DIP (Package 300)• 36 lead Ceramic SOJ (Package 100)• 36 lead Ceramic Flatpack (Package 226)
Organized as two banks of 512Kx8
WS1M8-XXX
Commercial, Industrial and Military Temperature Ranges5 Volt Power SupplyLow Power CMOS
TTL Compatible Inputs and Outputs
Packaging:
PIN CONFIGURATION FOR WS1M8-XDJXAND WS1M8-XFX 36 CSOJ 36 FLATPACKPIN CONFIGURATION FOR WS1M8-XCX 32 DIPTOP VIEWA0A1A2A3A4CS1#I/O0I/O1VCCGNDI/O2I/O3WE#A5A6A7A8A9TOP VIEWNCA18A17A16A15OE#I/O7I/O6GNDVCCI/O5I/O4A14A13A12A11A10CS2#1234567101112131415161718363534333231302928272625242322212019A18A16A14A12A7A6A5A4A3A2A1A0I/O0I/O1I/O2GND12345671011121314151632313029282726252423222120191817VCCA15A17WE#A13A8A9A11CS2#A10CS1#I/O7I/O6I/O5I/O4I/O3Pin DescriptionA0-18I/O0-7CS1-2#OE#WE#VCCGNDAddress InputsData Input/OutputChip SelectsOutput EnableWrite Enable+5.0V PowerGroundI/O0-7WE#OE#A0-18Pin DescriptionA0-18I/O0-7CS1-2#WE#VCCGNDAddress InputsData Input/OutputChip SelectsWrite Enable+5.0V PowerGroundBlock DiagramBlock DiagramI/O0-7WE#A0-18512K x 8512K x 8512K x 8512K x 8NOTE:1. CS1# and CS2# are used to select the lower and upper 512Kx8 of the device. CS1# and CS2# must not be enabled at the same time.White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.July 2004Rev. 5
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
CS1#(1)CS2#(1)CS1#(1)CS2#(1)元器件交易网www.cecb2b.com
White Electronic DesignsABSOLUTE MAXIMUM RATINGS
Parameter
Operating TemperatureStorage TemperatureSignal Voltage Relative to GNDJunction TemperatureSupply Voltage
SymbolTATSTGVGTJVCC
-0.5Min-65-0.5
Max+150VCC +0.51507.0
Unit°C°CV°CV
-55 +125WS1M8-XXX
TRUTH TABLE
CS#HLLL
OE#XLXH
WE#XHLH
ModeStandbyReadWriteOut Disable
Data I/OHigh ZData OutData InHigh Z
PowerStandbyActiveActiveActive
NOTE: OE# is internally tied to the GND and not accessible on the WS1M8-XCXX.
RECOMMENDED OPERATING CONDITIONS
ParameterSupply VoltageInput High VoltageInput Low VoltageOperating Temp. (Mil.)
SymbolVCCVIHVILTA
Min4.52.2-0.3-55
Max5.5VCC + 0.3+0.8+125
UnitVVV°C
ParameterInput capacitance Output capicitance
CAPACITANCE
TA = +25°C
SymbolCINCOUT
ConditionVIN = 0V, f = 1.0MHzVOUT = 0V, f = 1.0MHzMax2020
UnitpFpF
This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Input Leakage CurrentOutput Leakage CurrentOperating Supply Current Standby CurrentOutput Low VoltageOutput High Voltage
SymILIILOISB
11
Conditions
VCC = 5.5, VIN = GND to VCC
CS# = VIH, OE# = VIH, VOUT = GND to VCCCS# = VIL, OE# = VIH, f = 5MHz, VCC = 5.5CS# = VIH, OE# = VIH, f = 5MHz, VCC = 5.5IOL = 6mAIOH = -4.0mA
MinMax1010180400.4
UnitsµAµAmAmAVV
ICC
1
VOLVOH
2.4
NOTE: DC test conditions: VIH = VCC -0.3V , VIL = 0.3V
1. OE# is internally tied to the GND and not accessible on the WS1M8-XCXX.
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.July 2004Rev. 5
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
元器件交易网www.cecb2b.com
White Electronic DesignsAC CHARACTERISTICS
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
ParameterRead CycleRead Cycle TimeAddress Access TimeOutput Hold from Address ChangeChip Select Access TimeOutput Enable to Output ValidChip Select to Output in Low ZOutput Enable to Output in Low ZChip Disable to Output in High ZOutput Disable to Output in High ZSymboltRCtAAtOHtACStOE2tCLZ1tOLZ2tCHZ1tOHZ2-17Min1701792099201010Max1702010201212Min20-20Max2002512401515Min25-25Max250352540Min35-35Max350Min45WS1M8-XXX
-45Max4504525402020Min55-55Max555525Unitsnsnsnsnsnsnsnsnsns20201. This parameter is guaranteed by design but not tested.2. OE# is internally tied to the GND and not accessible on the WS1M8-XCXX.AC CHARACTERISTICSVCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°CParameterWrite CycleWrite Cycle TimeChip Select to End of WriteAddress Valid to End of WriteData Valid to End of WriteWrite Pulse WidthAddress Setup TimeAddress Hold TimeOutput Active from End of WriteWrite Enable to Output in High ZData Hold TimeSymboltWCtCWtAWtDWtWPtAStAHtOW1tWHZ1tDH 1714149 14002900-17201414101400390-202515151015004100-253525252025004150-354535352535055150-45555050254005525-55Unitsnsnsnsnsnsnsnsnsnsns1. This parameter is guaranteed by design but not tested.AC TEST CIRCUITIOLCurrent SourceAC TEST CONDITIONSParameterInput Pulse LevelsInput Rise and FallInput and Output Reference LevelOutput Timing Reference LevelV Z≈ 1.5V(Bipolar Supply)TypVIL = 0, VIH = 3.051.51.5UnitVnsVVD.U.T.C = 50 pfeffIOHCurrent SourceNotes:VZ is programmable from -2V to +7V.IOL & IOH programmable from 0 to 16mA.Tester Impedance Z0 = 75 Ω.VZ is typically the midpoint of VOH and VOL.IOL & IOH are adjusted to simulate a typical resistive load cir cuit.ATE tester includes jig capacitance.White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.July 2004Rev. 5
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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White Electronic DesignsTIMING WAVEFORM – READ CYCLE
tRCADDRESSWS1M8-XXX
tRCADDRESStAACS#tAAtOHDATA I/OPREVIOUS DATA VALIDDATA VALIDtACStCLZOE# tCHZREAD CYCLE 1 (CS# = OE# = VIL, WE# = VIH)tOEtOLZDATA I/OHIGH IMPEDANCEtOHZDATA VALIDREAD CYCLE 2 (WE# = VIH)NOTE: OE# is internally tied to the GND and not accessible on the WS1M8-XCXX.WRITE CYCLE – WE# CON TROLLED tWCADDRESStAWtCWCS#tASWE#tWHZDATA I/OtDWtWPtOWtDHtAHDATA VALIDWRITE CYCLE 1, WE# CONTROLLEDWRITE CYCLE – CS# CONTROLLEDtWCADDRESStASCS#tAWtCWtAHtWPWE#tDWDATA I/ODATA VALIDtDHWRITE CYCLE 2, CS# CONTROLLEDWhite Electronic Designs Corp. reserves the right to change products or specifi cations without notice.July 2004
Rev. 5
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
元器件交易网www.cecb2b.com
White Electronic DesignsPACKAGE 100: 36 LEAD, CERAMIC SOJ
WS1M8-XXX
23.37 (0.920) ± 0.25 (0.010)0.20 (0.008)± 0.05 (0.002)4.76 (0.184) MAX0. (0.035)Radius TYP11.3 (0.446)± 0.2 (0.009)9.55 (0.376) ± 0.25 (0.010)1.27 (0.050) ± 0.25 (0.010)PIN 1 IDENTIFIER1.27 (0.050) TYP21.59 (0.850) TYP0.43 (0.017) ± 0.05 (0.002)ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 226: 36 LEAD, CERAMIC FLAT PACK
23.37 (0.920) ± 0.25 (0.010)3.18 (0.125)MAXPIN 1IDENTIFIER12.95 (0.510)± 0.13 (0.005)12.7 (0.500) ± 0.5 (0.020)5.1 (0.200) ± 0.25 (0.010)0.43 (0.017) ± 0.05 (0.002)32. (1.285) TYP38.1 (1.50) ± 0.4 (0.015)0.127 (0.005)± 0.05 (0.002)1.27 (0.050) TYP21.59 (0.850) TYP3.8 (0.150) TYPALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.July 2004Rev. 5
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
元器件交易网www.cecb2b.com
White Electronic DesignsWS1M8-XXX
PACKAGE 300: 32 PIN, CERAMIC DIP, SINGLE CAVITY SIDE BRAZED
42.4 (1.670) ± 0.4 (0.016)15.04 (0.592) ± 0.3 (0.012)4.34 (0.171) ± 0.79 (0.031)PIN 1 IDENTIFIER0.84 (0.033) ± 0.4 (0.014)ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHESORDERING INFORMATIONW S 1M8 X - XXX X X XLEAD FINISH:Blank = Gold plated leads A = Solder dip leadsDEVICE GRADE: M = Military Screened -55°C to +125°C I = Industrial -40°C to +85°C C = Commercial 0°C to +70°CPACKAGE: C = 32 pin Ceramic 0.600\" DIP (Package 300) DJ = 36 Lead Ceramic SOJ (Package 100) F = 36 Lead Ceramic Flatpack (Package 226)ACCESS TIME (ns)IMPROVEMENT MARK: Blank = Standard Power ORGANIZATION, two banks of 512K x 8SRAMWHITE ELECTRONIC DESIGNS CORP.White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.July 2004Rev. 5
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
