MSM81C55-5GS

¡ SemiconductorMSM81C55-5RS/GS/JS

¡ Semiconductor2048-Bit CMOS STATIC RAM WITH I/O PORTS AND TIMER

This version: Jan. 1998MSM81C55-5RS/GS/JSPrevious version: Aug. 1996GENERAL DESCRIPTION

The MSM81C55-5 has a 2k-bit static RAM (256 bytes) with parallel I/O ports and a timer. It usessilicon gate CMOS technology and consumes a standby current of 100 micro ampere, maximum,while the chip is not selected. Featureing a maximum access time of 400 ns, the MSM81C55-5can be used in an MSM80C85AH system without using wait states. The parallel I/O consistsof two 8-bit ports and one 6-bit port (both general purpose).

The MSM81C55-5 also contains a 14-bit programmable counter/timer which may be used forsequence-wave generation or terminal count-pulsing.

FEATURES

•High speed and low power achieved with silicon gate CMOS technology•256 words x 8bits RAM

•Single power supply, 3 to 6 V•Completely static operation•On-chip address latch

•8-bit programmable I/O ports (port A and B)•TTL Compatible

•RAM data hold characteristic at 2 V•6-bit programmable I/O port (port C)

•14-bit programmable binary counter/timer•Multiplexed address/data bus

•Direct interface with MSM80C85AH

•40-pin Plastic DIP (DIP40-P-600-2.): (Product name: MSM81C55-5RS)•44-pin Plastic QFJ (QFJ44-P-S650-1.27): (Product name: MSM81C55-5JS)

•44-pin Plastic QFP (QFP44-P-910-0.80-2K): (Product name: MSM81C55-5GS-2K)

FUNCTIONAL BLOCK DIAGRAM

Port AIO/M

AAD0 - 7

CEALERDWRRESET

TimerCPort C6PC0 - 5

256 ¥ 8StaticRAMBPort B8PB0 - 7

8PA0 - 7

TIMER INTIMER OUTVCC (+5 V)GND (0 V)1/19

¡ SemiconductorMSM81C55-5RS/GS/JS

PIN CONFIGURATION (TOP VIEW)

40 pin Plastic DIP

PC31PC42TIMER IN3RESET4PC55TIMER OUT6IO/M7CE8RD9WR10ALE11AD012AD113AD214AD315AD416AD517AD618AD719GND204039383736353433323130292827262524232221VCCPC2PC1PC0PB7PB6PB5PB4PB3PB2PB1PB0PA7PA6PA5PA4PA3PA2PA1PA0

44 pin Plastic QFP42TIMER IN43RESET44PC1PC440PC337PC236PC135PC0TIMEROUT1IO/M2CE3RD4WR5ALE6AD07AD18AD29AD310NC11AD412AD513AD614AD715GND1617PA018PA119PA220PA3212238NC34PB733PB632PB531PB430PB329PB228PB127PB026PA725PA624PA523PA439VCC44 pin Plastic QFJ4TIMER IN5RESET44VCC6PC53PC42PC343PC242PC141PC0VCCTIMER OUT7

IO/M8CE9RD10WR11NC12ALE13AD014AD115AD216AD317AD41819AD520AD621AD722GND23PA024PA125PA226PA327PA42840PB739PB638PB537PB436PB335PB234NC33PB132PB031PA730PA629PA5

NCNC1NC2/19

¡ SemiconductorMSM81C55-5RS/GS/JS

ABSOLUTE MAXIMUM RATING

ParameterPower Supply VoltageInput VoltageOutput VoltageStorage TemperaturePower DissipationSymbolVCCVINVOUTTSTGPDConditionsReferencedto GND—Ta = 25°C1.0RatingMSM81C55-5RSMSM81C55-5GSMSM81C55-5JSUnitVVV°C–0.5 to +7–0.5 to VCC +0.5–0.5 to VCC +0.5–55 to +1500.71.0WOPERATING CONDITION

ParameterPower Supply VoltageOperating TemperatureSymbolVCCTOPRange3 to 6–40 to +85UnitV°CRECOMMENDED OPERATING CONDITIONS

ParameterPower Supply Voltage (81C55)Operating Temperature (81C55)\"L\" Level Input \"H\" Level Input Supply Voltage (81C55-5)Operating Temperature (81C55-5)SymbolVCCTOPVILVIHVCCVOPMin.4.5–40–0.32.24.75–40Typ.5+25——5+25Max.5.5+85+0.8VCC +0.35.25+70UnitV°CVVV°CDC CHARACTERISTICS

Parameter\"L\" Level Output Voltage\"H\" Level Output VoltageInput Leak CurrentOutput Leak CurrentStandby CurrentMean Operating CurrentSymbolVOLVOHILIILOICCSICCIOL = 2 mAIOH = –400 mAIOH = –40 mA0 £ VIN £ VCC0 £ VOUT £ VCCCE ≥ VCC –0.2 VVIH ≥ VCC –0.2 VVIL £ –0.2 VMemory cycle time: 1 msVCC = 4.5 V to 5.5 VTa = –40°C to 85°CConditionMin.—2.44.2–10–10—Typ.Max.Unit—0.45V————0.1——1010100VVmAmAmA——5mA3/19

¡ SemiconductorMSM81C55-5RS/GS/JS

AC CHARACTERISTICS

VCC = 4.5 V to 5.5 V,VCC = 4.75 V to 5.25 V,Ta = –40 to +80°CTa = –40 to +70°CUnit80C85AH 3MHz I/F80C85AH 5MHz I/FParameterSymbolRemarksAddress/latch Setup TimeLatch/address Holt TimeLatch/read (write) Delay TimeRead/output Delay TimeAddress/output Delay TimeLatch WidthRead/data Bus Floating TimeRead (write)/latch Delay TimeRead (write) WidthData In/write Setup TimeWrite/data-in Hold TimeRecovery TimeWrite/port Output Delay TimePort Input/read Setup TimeRead/port Input Hold TimeStrobe/buffer Full Delay TimeStrobe WidthStrobe/buffer Empty Delay TimeStrobe/interrupt-on Delay TimeRead/interrupt-off Delay TimePort Input/strobe Setup TimeStrobe/port-input Hold TimeStrobe/buffer-empty Delay TimeWrite/buffer-full Delay TimeWrite/interrupt-off Delay TimeTime Output Delay Time LowTime Output Delay Time HighRead/data Buse Enable Delay TimeTimer Cycle TimeTimer Input Rise and Fall TimesTimer Input Low Level TimeTimer Input High Level TimeWRITE to TIMER-INfor writes which start countingTIMER-IN to WRITEfor writes which start countingtALtLAtLCtRDtADtLLtRDFtCLtCCtDWtWDtRVtWPtPRtRPtSBFtSStRBEtSItRDItPSStPHStSBEtWBFtWItTLtTHtRDEtCYCtr, tft1t2tWTtTWMin.5030100——1000202501500300—7050—200———50120—————10320—801202000Max.———170400—100—————400——400—400400400——400400400400400——80————Min.373040——7002020010025200—5010—150———20100—————10320—40702000Max.———140330—80—————300——300—300300300——300300300300300——80————nsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsnsLoad capaci-tance: 150 pFNote:Timings are measured wth VL = 0.8 V and VH = 2.2 V for both input and output.

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¡ SemiconductorMSM81C55-5RS/GS/JS

TIMING DIAGRAM

Read Cycle

CEIO/MtADAD0 - 7AddressData ValidtALtLAALEtLLtRDEtRDFRDtRDtLCtCLtCCtRVWrite Cycle

CEIO/MAD0 - 7

AddressData ValidtALtLAtDWtCLALEWR

tLLtLCtWDtCCtRV5/19

¡ SemiconductorStrobe Input Mode

BF

tSBFSTROBE

tSSINTRRDInput DataFrom Port

tPHStSIMSM81C55-5RS/GS/JS

tRBEtRDItPSSStrobe Output Mode

BFtSBESTROBEtWBFINTRWROutput DataTo PorttWItWPtSI6/19

¡ SemiconductorBasic Input Mode

tRPRDPort InputData BustPRMSM81C55-5RS/GS/JS

Basic Output Mode

WRData BusPort OutputNote: The DATA BUS timing is the same as the read and write cycles.tWPTimer Waveforms 1

Load Counter FromCount Length Register2TIMER INtrTIMER OUT(Pulse)TIMER OUT(Square Wave)(Note)(Note)1tft1t2Load Counter FromCount Length Register321(T.C)5tCYCtTLtTLtTHtTHCount Down(5Æ1)Note: Periodically outut according to the output mode (m1=1) programming contents.7/19

¡ SemiconductorTimer Waveforms 2

WRTimer - StarttTWtWTMSM81C55-5RS/GS/JS

TIMER INRAM DATA HOLD CHARACTERISTICS AT LOW SUPPLY VOLTAGE

Item

Data Holding Supply VoltageData Holding Supply CurrentSetup TimeHold Time

SymbolVCCHICCHtSUtR

Condition

VIN = 0 V or VCC, ALE = 0 V VCC = VCCH, ALE = 0 VIN = 0 V or VCC

SpecificationMin.Typ.Max.2.0—3020

—0.05——

—20——

UnitVmAnsns

Two ways to place device in standby mode:(1) Method using CE

tSU 5 V4.5 VVCC Standby ModetRVCCHtLAALE0.8 V0 VtAL2.2 VCEVCCH8/19

¡ Semiconductor(2) Method using RESET

tSU 5 V4.5 V2.2 VVCCHRESETVCC Standby ModetRMSM81C55-5RS/GS/JS

GNDNote: In this case, the C/S register is reset, the port is set into the input mode, and the timer stops.PIN FUNCTION

SymbolRESETALEAD0 - 7CEIO/MRDWRPA0 - 7(PB0 - 7)FunctionA high level input to this pin resets the chip, places all three I/O ports in the input mode, resets all output latches and stops timer.Negative going edge of the ALE (Address Latch Enable) input latches AD0 - 7, IO/M, and CE signals into the respective latches.Three-state, bi-directional address/data bus. Eight-bit address information on this bus is read into the internal address latch at the negative going edge of the ALE. Eight bits of data can be read from or written to the chip using this bus depending on the state of the WRITE or READ input.When the CE input is high, both read and write operations to the chip are disabled.A high level input to this pin selects the internal I/O functions, and a low level selects the memory.If this pin is low, data from either the memory or ports is read onto the AD0 - 7 lines depending on the state of the IO/M line.If this pin is low, data on lines AD0 - 7 is written into either the memory or into the selected port depending on the state of the line IO/M line.General-purpose I/O pins. Input/output directions can be determined by programming the command/status (C/S) register.Three pins are usable either as general-purpose I/O pins or control pins for the PA and PB ports. When used as control pins, they are assigned to the following functions:PC0: A INTR (port A interrupt)PC1: A BF (port A full)PC2: ASTB (port A strobe)PC3: B INTR (port B interrupt)PC4: B BF (port B buffer full)PC5: BSTB (port B strobe)Input to the counter/timerTimer output. When the present count is reached during timer operation, this pin providesa square-wave or pulse output depending on the programmed control status.3–6V power supplyGNDPC0 - 5TIMER INTIMEROUTVCCGND9/19

¡ SemiconductorMSM81C55-5RS/GS/JS

OPERATION

Description

The MSM81C55-5 has three functions as described below.•2K-bit static RAM (256 words ¥ 8 bits)

•Two 8-bit I/O ports (PA and PB) and a 6-bit I/O port (PC)•14-bit timer counter

The internal register is shown in the figure below, and the I/O addresses are described in thetable below.

8 Bit Internal Data BusCommandStatusPCPBPATimerMSBTimerLSB6 Bit8 Bit8 BitTimer ModeA7¥󰀀¥󰀀¥󰀀¥󰀀¥󰀀¥󰀀A6¥󰀀¥󰀀¥󰀀¥󰀀¥󰀀¥󰀀A5¥󰀀¥󰀀¥󰀀¥󰀀¥󰀀¥󰀀I/O AddressA4A3A2¥󰀀¥󰀀¥󰀀¥󰀀¥󰀀¥󰀀¥󰀀¥󰀀¥󰀀¥󰀀¥󰀀¥󰀀000011A1001100A0010101Selecting RegisterInternal command/status registerUniversal I/O port A (PA)Universal I/O port B (PB)I/O port C (PC)Timer count lower position 8 bits (LSB)Timer count upper position 6 bits and timer mode2 bits (MSB)¥: Don't care.10/19

¡ Semiconductor

(1)Programming the Command/Status (C/S) Register

MSM81C55-5RS/GS/JS

The contents of the command register can be written during an I/O cycle by addressing itwith an I/O address of xxxxx000. Bit assignments for the register are shown below:

7TM26TM15IEB4IEA3PC22PC11PB0PADefinition of PA0 - 7 Definition of PB0 - 7 Definition of PC0 - 50= Input1= Output00=ALT111=ALT201=ALT310=ALT4See the portcontrolassignmenttable.Port A Interrupt EnablePort B Interrupt Enable1 = Enabled0 = DisabledTimer Command00 = NOP :Does not affect counter operations.01 = STOP :Stops the timer if it is runnning.NOP if the timer is not runnning.10 = STOP AFTER TC :Stops the timer when it reaches TC.NOP if the timer is not running.11 = START :If the timer is not running, loads the mode and the count length, and immediately starts timer operation.If the timer is running, loads a new mode and the countlength, and starts timer operation immediately afterTC is reached.Port Control Assignment TablePinPC0PC1PC2PC3PC4PC5ALT1Input portInput portInput portInput portInput portInput portALT2Output portOutput portOutput portOutput portOutput portOutput portALT3A INTRA BFA STBOutput portOutput portOutput portALT4A INTRA BFA STBB INTRB BFB STB11/19

¡ Semiconductor(2)Reading the C/S Register

MSM81C55-5RS/GS/JS

The I/O and timer status can be accessed by reading the contents of the Status registerlocated at I/O address xxxxx000. The status word format is shown below:

AD7AD6TIMERAD5INTEBAD4BBFAD3INTRBAD2INTEAAD1ABFAD0INTRAPort A Interrupt RequestPort A Buffer FullPort A Interrupt EnablePort B Interrupt RequestPort B Buffer FullPort B Interrupt EnableTimer Interrupt. This bit is set high when the timerreaches TC, and is reset when the C/S register is read or a hardware reset occurs.(3)PA and PB Registers

These registers may be used as either input or output ports depending on the programmedcontents of the C/S register. They may also be used either in the basic mode or in the strobemode.

I/O address of the PA register: xxxxx001I/O address of the PB register: xxxxx010(4)PC Register

The PC register may be used as an input port, output port or control register depending onthe programmed contents of the C/S register. The I/O address of the PC register isxxxxx011.(5)Timer

The timer is a 14-bit down counter which counts TIMER IN pulses.

The low order byte of the timer register has an I/O address of xxxxx100, and the high orderbyte of the register has an I/O address of xxxxx101.

The count length register (CLR) may be preset with two bytes of data. Bits 0 through 13 areassigned to the count length and bits 14 and 15 specify the timer output mode. A readoperation of the CLR reads the contents of the counter and the pertinent output mode. Theinitial value range which can initially be loaded into the counter is 2 through 3FFF hex. Bitassignments to the timer counter and possible output modes are shown in the following.

M2

M1

T13

T12

T11

T10

T9

T8

Output ModeHigh Order 6 Bits of Count Length

T7T6T5T4T3T2T1T0

Low Order Byte of Count Length

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¡ Semiconductor

M20011

M10101

MSM81C55-5RS/GS/JS

Outputs a low-level signal in the latter half (Note 1) of a count period.Outputs a low-level signal in the latter half of a count period, automaticallyloads the programmed count length, and restarts counting when the TCvalue is reached.

Outputs a pulse when the TC value is reached.

Outputs a pulse each time the preset TC value is reached, automaticallyloads the programmed count length, and restarts from the beginning.

Notes:1.When counting an asymmetrical value such as (9), a high level is output during

the first period of five,and a low level is output during the second period of four.2.If an internal counter of the MSM81C55-5 receives a reset signal, count operationstops but the counter is not set to a specific initial value or output mode. Whenrestarting count operation after reset, the START command must be executedagain through the C/S register.Note that while the counter is counting, you may load a new count and mode into the CLR.Before the new count and mode will be used by the counter, you must issue a STARTcommand to the counter. Please note the timer circuit on the MSM81C55-5 is designed tobe a square-wave timer, not a event counter. To achieve this, it counts down by twos twicein completing one cycle. Thus, its registers do not contain values directly representing thenumber of TIMER IN pulse received. After the timer has started counting down, the valuesresiding in the count registers can be used to calculate the actual number of TIMER IN pulserequired to complete the timer cycle if desired. To obtain the remaining count, perform thefollowing operations in order.1.2.3.4.5.

STOP the counter

Read in the 16-bit value from the count registers.Reset the upper two mode bits

Reset the carry and rotate right one position all 16 bits through carry

If carry is set, add 1/2 of the full original count (1/2 full count-1 if full count is odd).

Note:If you started with an odd count and you read the count registers before the thirdcountpulse occurs, you will not be able to recognize whether one or twocounts haveoccurred. Regardless of this, the MSM81C55-5 always counts out the right number of pulsesin generating theTIMER OUT waveforms.TIMER-INWRn=5Start55342(TC)55TIMER-OUT(Square Wave)TIMER-OUT(Pulse)WRn=4Start5342(TC)534TIMER-OUT(Square Wave)TIMER-OUT(Pulse)Note: n is the value set in the CLR. Figures in the diagram refer to counter values13/19

¡ SemiconductorMSM81C55-5RS/GS/JS

(6)Standby Mode (see page 7)

The MSM81C55-5 is placed in standby mode when the high level at the CE input is latchedduring the negative going edge of ALE. All input ports and the timer input should be pulledup or down to either VCC or GND potential.

When using battery back-up, all ports should be set low or in input port mode. The timeroutput should be set low. Otherwise, a buffer should be added to the timer output and thebattery should be connected to the power supply pins of the buffer.

By setting the reset input to a high level, the standby mode can be selected. In this case, thecommand register is reset, so the ports automatically set to the input mode and the timerstops.

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¡ SemiconductorMSM81C55-5RS/GS/JS

NOTICE ON REPLACING LOW-SPEED DEVICES WITH HIGH-SPEED DEVICESThe conventional low speed devices are replaced by high-speed devices as shown below.

When you want to replace your low speed devices with high-speed devices, read the replacementnotice given on the next pages.

High-speed device (New)M80C85AHM80C86A-10M80C88A-10M82C84A-2M81C55-5M82C37B-5M82C51A-2M82C53-2M82C55A-2

Low-speed device (Old)M80C85A/M80C85A-2M80C86A/M80C86A-2M80C88A/M80C88A-2M82C84A/M82C84A-5M81C55

M82C37A/M82C37A-5M82C51AM82C53-5M82C55A-5

Remarks8bit MPU16bit MPU8bit MPUClock generatorRAM.I/O, timerDMA controllerUSARTTimerPPI

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¡ Semiconductor

Differences between MSM81C55-5 and MSM81C551) Manufacturing Process

These devices use a 3 m Si-CMOS.

MSM81C55-5RS/GS/JS

2) Design

These devices use the same chip. However, different outgoing inspection standards are used forthese devices separately.

3) Electrical Characteristics

''Oki's '96 Data Book for MICROCONTROLLER'' describes that the MSM81C55-5 satisfies theelectrical characteristics of the MSM81C55.

As shown above, the devices can be replaced without any trouble.

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¡ SemiconductorMSM81C55-5RS/GS/JS

PACKAGE DIMENSIONS

(Unit : mm)

DIP40-P-600-2.Package materialLead frame materialPin treatmentSolder plate thicknessPackage weight (g)Epoxy resin42 alloySolder plating5 mm or more6.10 TYP.Notes for Mounting the Surface Mount Type Package

The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, whichare very susceptible to heat in reflow mounting and humidity absorbed in storage.

Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for theproduct name, package name, pin number, package code and desired mounting conditions(reflow method, temperature and times).

17/19

¡ SemiconductorMSM81C55-5RS/GS/JS

(Unit : mm)

QFJ44-P-S650-1.27Mirror finishPackage materialLead frame materialPin treatmentSolder plate thicknessPackage weight (g)Epoxy resinCu alloySolder plating5 mm or more2.00 TYP.Notes for Mounting the Surface Mount Type Package

The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, whichare very susceptible to heat in reflow mounting and humidity absorbed in storage.

Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for theproduct name, package name, pin number, package code and desired mounting conditions(reflow method, temperature and times).

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¡ SemiconductorMSM81C55-5RS/GS/JS

(Unit : mm)

QFP44-P-910-0.80-2KMirror finishPackage materialLead frame materialPin treatmentSolder plate thicknessPackage weight (g)Epoxy resin42 alloySolder plating5 mm or more0.41 TYP.Notes for Mounting the Surface Mount Type Package

The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, whichare very susceptible to heat in reflow mounting and humidity absorbed in storage.

Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for theproduct name, package name, pin number, package code and desired mounting conditions(reflow method, temperature and times).

19/19