CA3162_02资料

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CA3162

A/DConvertersfor3-DigitDisplay

Description

TheCA3162EandCA3162AEareI2LmonolithicA/Dconvertersthatprovidea3digitmultiplexedBCDoutput.TheyareusedwiththeCA3161EBCD-to-Seven-SegmentDecoder/Driverandaminimumofexternalpartstoimple-mentacomplete3-digitdisplay.TheCA3162AEisidenticaltotheCA3162Eexceptforanextendedoperatingtempera-turerange.

TheCA3161EisdescribedintheDisplayDriverssectionofthisdatabook.

April2002

Features

•DualSlopeA/DConversion•MultiplexedBCDDisplay

•UltraStableInternalBandGapVoltageReference•CapableofReading99mVBelowGroundwithSingleSupply•DifferentialInput

•InternalTiming-NoExternalClockRequired

•ChoiceofLowSpeed(4Hz)orHighSpeed(96Hz)ConversionRate•“Hold”InhibitsConversionbutMaintainsDelay•OverrangeIndication

-“EEE”forReadingGreaterthan+999mV,“-”forReadingMoreNegativethan-99mVWhenUsedWithCA3161E

OrderingInformation

PARTNUMBERCA3162E

TEMP.RANGE(oC)0to70

PACKAGE16LdPDIP

PKG.NO.E16.3

Pinout

CA3162(PDIP)TOPVIEW

BCDOUTPUTS

2120NSD

12345678

1623152214V+

BCD

OUTPUTS

DIGITSELECTOUTPUTS

MSDLSD

13GAINADJ12

INTEGRATINGCAP

HOLD/BYPASS

GNDZEROADJ

11HIGHINPUT10LOWINPUT9

ZEROADJ

CAUTION:Thesedevicesaresensitivetoelectrostaticdischarge;followproperICHandlingProcedures.1-888-INTERSILor321-724-7143|Intersil(anddesign)isaregisteredtrademarkofIntersilAmericasInc.Copyright©IntersilAmericasInc.2002.AllRightsReserved

FN1080.3

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CA3162

FunctionalBlockDiagram

V+

ZEROADJ

8

9

V+

BCDOUTPUTS

INTEGRATINGCAP12

211

202

2215

2316

V+14

3

CONTROLLOGIC

COUNTERSANDMULTIPLEX

DIGITDRIVE

45

DIGITSELECTOUTPUTS†45

=MSD=LSD=NSD

HIGHINPUT11LOWINPUT10

V/I

CONVERTER

THRESHOLDDET.

÷2048÷96

3

REFERENCECURRENTGENERATOR

BANDGAPREFERENCE

OSC

HOLD/BYPASSGATES

6

CONVERSIONCONTROL

†

13

MSD=MOSTSIGNIFICANTDIGITNSD=NEXTSIGNIFICANTDIGITLSD=LEASTSIGNIFICANTDIGIT

7GND

GAINADJ

2

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CA3162

AbsoluteMaximumRatings

DCSupplyVoltage(BetweenPins7and14)...............+7VInputVoltage(Pin10or11toGround)...................±15V

ThermalInformation

ThermalResistance(Typical,Note1)

θJA(oC/W)

OperatingConditions

TemperatureRange

CA3162E.....................................0to75oC

PDIPPackage.............................90

MaximumJunctionTemperature.......................150oCMaximumStorageTemperatureRange..........-65oCto150oCMaximumLeadTemperature(Soldering10s).............300oC

CAUTION:Stressesabovethoselistedin“AbsoluteMaximumRatings”maycausepermanentdamagetothedevice.Thisisastressonlyratingandoperationofthedeviceattheseoranyotherconditionsabovethoseindicatedintheoperationalsectionsofthisspecificationisnotimplied.

NOTE:

1.θJAismeasuredwiththecomponentmountedonaloweffectivethermalconductivitytestboardinfreeair.SeeTechBriefTB379fordetails..

ElectricalSpecifications

PARAMETER

TA=25oC,V+=5V,ZeroPotCentered,GainPot=2.4kΩ,UnlessOtherwiseSpecified

TESTCONDITIONS

MIN4.5

100kΩtoV+onPins3,4,5

--Pins10and11

V11-V10=0V,ReadDecodedOutputV11-V10=900mV,ReadDecodedOutputNotes1and2

--12846-1

TYP5-100-80---MAX5.517--+12954+1

UNITSVmAMΩnAmVmVCount

OperatingSupplyVoltageRange,V+SupplyCurrent,I+InputImpedance,ZIInputBiasCurrent,IIBUnadjustedZeroOffsetUnadjustedGainLinearityConversionRateSlowModeFastMode

ConversionControlVoltage(HoldMode)atPin6

CommonModeInputVoltageRange,VICRBCDSinkCurrentatPins1,2,15,16DigitSelectSinkCurrentatPins3,4,5ZeroTemperatureCoefficientGainTemperatureCoefficientNOTES:

Notes3,4

VBCD≥0.5V,atLogicZeroStateVDIGITSelect=4VatLogicZeroStateVI=0V,ZeroPotCenteredVI=900mV,GainPot=2.4kΩPin6=OpenorGNDPin6=5V

--0.8

4961.2

--1.6

HzHzV

-0.20.41.6--

-1.62.5100.005

+0.2----

VmAmAµV/oV%/oC

1.Apply0VacrossV11toV10.Adjustzeropotentiometertogive000mVreading.Apply900mVtoinputandadjustgainpotentiometertogive900mVreading.2.Linearityismeasuredasadifferencefromastraightlinedrawnthroughzeroandpositivefullscale.Limitsdonotinclude±0.5countbitdigitizingerror.3.Forapplicationswherelowinputpin10isnotoperatedatpin7potential,areturnpathofnotmorethan100kΩresistancemustbeprovidedforinputbiascurrents.4.Thecommonmodeinputvoltageabovegroundcannotexceed+0.2Vifthefullinputsignalrangeof999mVisrequiredatpin11.Thatis,pin11maynotoperatehigherthan1.2Vpositivewithrespecttogroundor0.2Vnegativewithrespecttoground.Ifthemaximuminputsignalislessthan999mV,thecommonmodeinputvoltagemayberaisedaccordingly.

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CA3162

TimingDiagram

125(LSD)PINNUMBER200mV500mV

referenceconstantcurrentsourceofoppositepolarityisconnected.Thenumberofclockcountsthatelapsebeforethechargeisrestoredtoitsoriginalvalueisadirectmeasureofthesignalinducedcurrent.Therestorationissensedbythecomparator,whichinturnlatchesthecounter.ThecountisthenmultiplexedtotheBCDoutputs.

ThetimingfortheCA3162Eissuppliedbya786Hzringoscillator,andtheinputatpin6determinesthesamplingrate.A5Vinputprovidesahighspeedsamplingrate(96Hz),andgroundingorfloatingpin6providesalowspeed(4Hz)sam-plingrate.Whenpin6isfixedat+1.2V(byplacinga12Kresistorbetweenpin6andthe+5Vsupply)a“hold”featureisavailable.WhiletheCA3162Eisintheholdmode,samplingcontinuesat4Hzbutthedisplaydataarelatchedtothelastreadingpriortotheapplicationofthe1.2V.Removalofthe1.2Vrestorescontinuousdisplaychanges.Note,however,thatthesamplingrateremainsat4Hz.

Figure1showsthetimingofsamplinganddigitselectpulsesforthehighspeedmode.NotethatthebasicA/Dconversionprocessrequiresapproximately5msinbothmodes.The“EEE”or“---”displaysindicatethattherangeofthesystemhasbeenexceededinthepositiveornegativedirection,respectively.Negativevoltagesto-99mVaredisplayedwiththeminussignintheMSD.TheBCDcodeis1010foranegativeoverrange(---)and1011forapositiveoverrange(EEE).

4(MSD)

500mV

3(NSD)

500mV

2ms/DIV.

FIGURE1.HIGHSPEEDMODE

DetailedDescription

TheFunctionalBlockDiagramoftheCA3162EshowstheV/Iconverterandreferencecurrentgenerator,whichistheheartofthesystem.TheV/Iconverterconvertstheinputvoltageappliedbetweenpins10and11toacurrentthatchargestheintegratingcapacitoronpin12forapredeterminedtimeinter-val.Attheendofthecharginginterval,theV/Iconverterisdis-connectedfromtheintegratingcapacitor,andabandgap

NOTE1

0.27µF

NOTE2

+5V

0.1µF

MSD

NSD

NORMAL8LOWSPEEDMODE:V6=GROUNDOR

OPENHOLD:V6=1.2V

6

9121416

COMMONANODELEDDISPLAYS

LSD

POWER

2N2907,2N3906OREQUIV.

a534

ab

fgc

edc

e

b

f

abfged13

CA3161E

121110915148

3

HIGHSPEEDMODE:V6=5V

CA3162E

DIGITDRIVERSBCDOUTPUTS

HIGH

INPUTS

LOW

1116151

6217

10

13

GAINADJ

10kΩ

7

2

R1150Ω

CA3162EPINS3,4,5

1kΩDIGITDRIVER

CA3162EPINS1,2,15,16

75Ω

R2150ΩR3150Ω

NOTES:

1.Thecapacitorusedheremustbealowdielectricabsorptiontypesuchasapolyesterorpolystyrenetype.

2.ThiscapacitorshouldbeplacedascloseaspossibletothepowerandgroundPinsoftheCA3161E.

BCDSEGMENTDRIVERS

FIGURE2.BASICDIGITALREADOUTSYSTEMUSINGTHECA3162EANDTHECA3161E

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CA3162

CA3162ELiquidCrystalDisplay(LCD)ApplicationFigure3showstheCA3162EinatypicalLCDapplication.LCDsmaybeusedinfavorofLEDdisplaysinapplicationsrequiringlowerpowerdissipation,suchasbattery-operatedequipment,orwhenvisibilityinhigh-ambient-lightconditionsisdesired.

MultiplexingofLCDdigitsisnotpractical,sinceLCDsmustbedrivenbyanACsignalandtheaveragevoltageacrosseachsegmentiszero.ThreeCD4056Bliquid-crystaldecoder/driversarethereforeused.EachCD4056BcontainsaninputlatchsothattheBCDdataforeachdigitmaybelatchedintothedecoderusingtheinverteddigit-selectout-putsoftheCA3162Easstrobes.

ThecapacitorsontheoutputsofinvertersG3andG4filteroutthedecodespikesontheMSDandNSDsignals.The

capacitorsandpull-upresistorsconnectedtotheMSD,NSDandLSDoutputsaretheretoshortenthedigitdrivesignaltherebyprovidingpropertimingfortheCD4056Blatches.InvertersG1andG2areusedasanastablemultivibratortoprovidetheACdrivetotheLCDbackplane.InvertersG3,G4andG5arethedigit-selectinvertersandrequirepull-upresistorstointerfacetheopen-collectoroutputsoftheCA3162EtoCMOSlogic.TheBCDoutputsoftheCA3162EmaybeconnecteddirectlytothecorrespondingCD4056Binputs(usingpull-upresistors).Inthisarrangement,theCD4056Bdecodesthenegativesign(-)asan“L”andthepositiveoverloadindicator(E)asan“H”.

ThecircuitasshowninFigure3usingG7,G8andG9willdecodethenegativesign(-)asanegativesign(-),andthepositiveoverloadindicator(E)as“H”.

+5V

0.047µF

G30.047µF

+5V

123

6x10kΩ

0.27µF

ZERO50kΩ

8149CA3162E

“HOLD”

VIN+VIN-111013

GAIN

10kΩ

+5V

G7

G1-G6:CD4049UB

HEXINVERTER

G7,G8,G9:CD4023B

TRIPLE3INPUTNANDGATE

G8

G9

124

351615127

MSDNSDLSD232221204x100kΩ

+5V

G512357

8

TOLCDBACKPLANE

CD4056B

TOLSDOFLCD

16

0.047µF

0.047µF

G40.047µF

57

8

CD4056B

TOMSDOFLCD

16

+5V

12357

8

CD4056B

TONSDOFLCD

16

15kΩ

100kΩ0.63µF

FIGURE3.TYPICALLCDAPPLICATION

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CA3162

CA3162ECommon-Cathode,LEDDisplayApplicationFigure4showstheCA3162EconnectedtoaCD4511Bdecode/drivertooperateacommon-cathodeLEDdisplay.UnliketheCA3161E,theCD4511BremainsblankforallBCDcodesgreaterthannine.After999mVthedisplayblanksratherthandisplayingEEE,aswiththeCA3161E.Whendisplayingnegativevoltage,thefirstdigitremainsblank,insteadof(-),andduringanegativeorpositiveover-rangethedisplayblanks.

TheadditionallogicshownwithinthedottedareaofFigure4restoresthenegativesign(-),allowingthedisplayofnegativenumbersaslowas-99mV.Negativeoverrangeisindicatedbyanegativesign(-)intheMSDposition.Therestofthedisplayisblanked.Duringapositiveoverrange,onlysegmentboftheMSDisdisplayed.OneinverterfromtheCD4049Bisusedtooperatethedecimalpoints.Byconnect-ingtheinverterinputtoeithertheMSDorNSDlineeitherDP1orDP2willbedisplayed.

V+

DP1DP2

100kΩ

22kΩ

1/3

1/CD4049UB6

CD4049UB

CD4012B

1/3

CD4049UB

1/CD4049UB6

V+

1B2C

100kΩV+100kΩ

100kΩ100kΩ

3LT4BL

CD4511BV+16

1.8kΩ

1.2kΩ

1.8kΩ

1.2kΩ

1.8kΩ1.8kΩ1.8kΩ12

1110

9

8

7

f15g14a13

HP5082-7433OREQUIVALENT

5LE/STROBEb126D7A8GND

c11d10e9

fagb

c3

V+

DP1

100kΩ

100kΩ

100kΩ

1B2A3NSD4MSD5LSD6HOLD7GND8ZERO

CA3162E

D16C15V+14GAIN13INT12HIGH11LOW10ZERO9V+50kΩ

INPUT

6BUFFERS(1CD4050B)

V+0.27µF

DP2

c1

1

2

ed

3

c2

4

c

5

dP

6

10kΩGAIN

FIGURE4.TYPICALCOMMON-CATHODELEDAPPLICATION

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CA3162

DieCharacteristicsDIEDIMENSIONS:101milsx124milsx20mils±1milMETALLIZATION:Type:AlThickness:17.5kű2.5kÅPASSIVATION:Type:3%PSGThickness:13kű2.5kÅMetallizationMaskLayoutCA3162LOWINPUTZEROADJZEROADJHIGHINPUTINTEGRATINGCAPHOLD/BYPASSLSDGNDMSDGAINADJ21V+20AllIntersilU.S.productsaremanufactured,assembledandtestedutilizingISO9000qualitysystems.IntersilCorporation’squalitycertificationscanbeviewedatwww.intersil.com/design/qualityIntersilproductsaresoldbydescriptiononly.IntersilCorporationreservestherighttomakechangesincircuitdesign,softwareand/orspecificationsatanytimewithoutnotice.Accordingly,thereaderiscautionedtoverifythatdatasheetsarecurrentbeforeplacingorders.InformationfurnishedbyIntersilisbelievedtobeaccurateandreliable.However,noresponsibilityisassumedbyIntersiloritssubsidiariesforitsuse;norforanyinfringementsofpatentsorotherrightsofthirdpartieswhichmayresultfromitsuse.NolicenseisgrantedbyimplicationorotherwiseunderanypatentorpatentrightsofIntersiloritssubsidiaries.ForinformationregardingIntersilCorporationanditsproducts,seewww.intersil.com7

NSD2223