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IRF840LC

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IRF840LC, SiHF840LC

Vishay Siliconix

Power MOSFET

PRODUCT SUMMARY

VDS (V)RDS(on) (Ω)Qg (Max.) (nC)Qgs (nC)Qgd (nC)Configuration

VGS = 10 V

391019Single

DFEATURES

500

0.85

•••••••Ultra Low Gate Charge

Reduced Gate Drive RequirementEnhanced 30 V VGS RatingReduced Ciss, Coss, Crss

Extremely High Frequency OperationRepetitive Avalanche RatedLead (Pb)-free Available

AvailableRoHS*COMPLIANTDESCRIPTION

This new series of low charge Power MOSFETs achievesigniticantly lower gate charge over conventional MOSFETs.Utilizing the new LCDMOS technology, the deviceimprovements are achieved without added product cost,allowing for reduced gate drive requirements and totalsystem savings. In addition, reduced switching losses andimproved efficiency are achievable in a variety of highfrequency applications. Frequencies of a few MHz at highcurrent are possible using the new low charge MOSFETs.These device improvements combined with the provenruggedness and reliability that are characteristic of PowerMOSFETs offer the designer a new standard in powertransistors for switching applications.

TO-220

GS

SN-Channel MOSFET G

D

ORDERING INFORMATION

PackageLead (Pb)-freeSnPb

TO-220

IRF840LCPbFSiHF840LC-E3IRF840LCSiHF840LC

ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted

ARAMETER SYMBOLDrain-Source Voltage Gate-Source VoltageContinuous Drain Current

Pulsed Drain CurrentaLinear Derating Factor

Single Pulse Avalanche EnergybRepetitive Avalanche CurrentaRepetitive Avalanche EnergyaMaximum Power DissipationPeak Diode Recovery dV/dtc

Operating Junction and Storage Temperature RangeSoldering Recommendations (Peak Temperature)Mounting Torque

VGS at 10 V

TC = 25 °C TC = 100 °C

LIMIT

UNIT

500VDS

V

VGS ± 30

8.0

ID

A5.1

IDM 281.0W/°C

EAS 510mJ IAR 8.0A EAR13mJ PD125W dV/dt 3.5V/ns - 55 to + 150 TJ, Tstg

°C

300d10lbf · in1.1N · m

TC = 25 °C

for 10 s6-32 or M3 screw

Notes

a.Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).b.VDD = 50 V, starting TJ = 25 °C, L = 14 mH, RG = 25 Ω, IAS = 8.0 A (see fig. 12).c.ISD ≤ 8.0 A, dI/dt ≤ 100 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.d.1.6 mm from case.

* Pb containing terminations are not RoHS compliant, exemptions may applyDocument Number: 91067S-83030-Rev. A, 19-Jan-09

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IRF840LC, SiHF840LC

Vishay Siliconix

THERMAL RESISTANCE

ARAMETER SYMBOLMaximum Junction-to-AmbientCase-to-Sink, Flat, Greased SurfaceMaximum Junction-to-Case (Drain)

RthJARthCSRthJC

TY.-0.50-MAX.62-1.0

°C/WUNIT

SPECIFICATIONS TJ = 25 °C, unless otherwise notedARAMETER SYMBOLStaticDrain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance DynamicInput Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate-Source Charge Gate-Drain ChargeTurn-On Delay Time Rise TimeTurn-Off Delay Time Fall Time Internal Drain Inductance Internal Source InductanceDrain-Source Body Diode CharacteristicsContinuous Source-Drain Diode Current Pulsed Diode Forward CurrentaBody Diode VoltageBody Diode Reverse Recovery TimeBody Diode Reverse Recovery ChargeForward Turn-On TimeISISMVSDtrrQrrtonMOSFET symbolshowing the integral reversep - n junction diodeDTEST CONDITIONS MIN.TY.MAX.VGS = 0 V, ID = 250 µA Reference to 25 °C, ID = 1 mAVDS = VGS, ID = 250 µA VGS = ± 20 VVDS = 500 V, VGS = 0 V VDS = 400V, VGS = 0 V, TJ = 125 °C VGS = 10 VID = 4.8 AbVDS = 50 V, ID = 4.8 Ab500-2.0----4.0-0.63--------4.0± 100252500.85----391019-----UNITV V/°C V nA µA ΩS VDS ΔVDS/TJ VGS(th)IGSS IDSS RDS(on) gfs Ciss -1100VGS = 0 V, PCoss VDS = 25 V, -170f = 1.0 MHz, see fig. 5 -18Crss ID = 8.0 A, VDS = 400 V Qgs VGS = 10 V see fig. 6 and 13bQgd Ptd(on) VDD = 250 V, ID = 8.0 A, RG = 9.1 Ω, RD= 30 Ωtd(off) see fig. 10btf LD LSBetween lead,6 mm (0.25\") from package and center of die contact DpFQg ---------S---122527194.57.5nC tr nsGnH ---------4903.08.0A282.07404.5VnsµCGSTJ = 25 °C, IS = 8.0 A, VGS = 0 VbTJ = 25 °C, IF = 8.0 A,dI/dt = 100 A/µsbIntrinsic turn-on time is negligible (turn-on is dominated by LS and LD)Notes

a.Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).b.Pulse width ≤ 300 µs; duty cycle ≤ 2 %.

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Document Number: 91067S-83030-Rev. A, 19-Jan-09

IRF840LC, SiHF840LC

Vishay Siliconix

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

101ID, Drain Current (A)ID, Drain Current (A)100VGS15 V10 V8.0 V7.0 V6.0 V5.5 V5.0 VBottom4.5 VTop101150 °C25 °C4.5 V10-110-110020 µs Pulse WidthTC = 25 °C10110020 µs Pulse WidthVDS = 50 V45671091067_01VDS, Drain-to-Source Voltage (V)91067_03VGS, Gate-to-Source Voltage (V)Fig. 1 - Typical Output Characteristics, TC = 25 °C

Fig. 3 - Typical Transfer Characteristics

101ID, Drain Current (A)100VGSTop15 V10 V8.0 V7.0 V6.0 V5.5 V5.0 VBottom4.5 VRDS(on), Drain-to-Source On Resistance(Normalized)3.02.52.01.51.00.5ID = 8.0 AVGS = 10 V4.5 V10-110-191067_0220 µs Pulse WidthTC = 150 °C1001010.0- 60- 40- 20020406080100120140160VDS, Drain-to-Source Voltage (V)91067_04TJ, Junction Temperature (°C)Fig. 2 - Typical Output Characteristics, TC = 150 °C

Fig. 4 - Normalized On-Resistance vs. Temperature

Document Number: 91067S-83030-Rev. A, 19-Jan-09

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IRF840LC, SiHF840LC

Vishay Siliconix

24002000ISD, Reverse Drain Current (A)Capacitance (pF)VGS = 0 V, f = 1 MHzCiss = Cgs + Cgd, Cds ShortedCrss = CgdCoss = Cds + CgdCiss160012008004000100101CossCrss101150 °C25 °C1000.691067_07VGS = 0 V0.81.01.21.41.691067_05VDS, Drain-to-Source Voltage (V)VSD, Source-to-Drain Voltage (V)Fig. 5 - Typical Capacitance vs. Drain-to-Source VoltageFig. 7 - Typical Source-Drain Diode Forward Voltage

20VGS, Gate-to-Source Voltage (V)ID = 8.0 AVDS = 400 VVDS = 250 V10352Operation in this area limitedby RDS(on)ID, Drain Current (A)16VDS = 100 V102521210 µs100 µs1 msTC = 25 °CTJ = 150 °CSingle Pulse125105284For test circuitsee figure 1315210 ms0091067_060.181624324041067_08102510225103QG, Total Gate Charge (nC)VDS, Drain-to-Source Voltage (V)Fig. 6 - Typical Gate Charge vs. Gate-to-Source VoltageFig. 8 - Maximum Safe Operating Area

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Document Number: 91067S-83030-Rev. A, 19-Jan-09

IRF840LC, SiHF840LC

Vishay Siliconix

RDVDSVGS8.0RGD.U.T.+-VDDID, Drain Current (A)6.010 VPulse width ≤ 1 µsDuty factor ≤ 0.1 % 4.0Fig. 10a - Switching Time Test Circuit

2.0VDS90 %0.02591067_09507510012515010 %VGStd(on)trtd(off)tfTC, Case Temperature (°C)Fig. 9 - Maximum Drain Current vs. Case TemperatureFig. 10b - Switching Time Waveforms

10Thermal Response (ZthJC)1D = 0.50.20.10.10.050.020.0110-210-510-410-310-20.1Single Pulse(Thermal Response)PDMt1t2Notes:1. Duty Factor, D = t1/t22. Peak Tj = PDM x ZthJC + TC11091067_11t1, Rectangular Pulse Duration (s)Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

LVary tp to obtainrequired IASRGVDStpVDSVDDD.U.T.IAS+-VDDVDS10 Vtp0.01 ΩIASFig. 12b - Unclamped Inductive Waveforms

Document Number: 91067S-83030-Rev. A, 19-Jan-09

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Fig. 12a - Unclamped Inductive Test Circuit

IRF840LC, SiHF840LC

Vishay Siliconix

1200EAS, Single Pulse Energy (mJ)10008006004002000VDD = 50 V255075100ID3.6 A5.1 ABottom8.0 ATop12515091067_12cStarting TJ, Junction Temperature (°C)Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Current regulatorSame type as D.U.T.QG12 V50 kΩ0.2 µF0.3 µF10 VQGSQGDD.U.T.+-VDSVGVGS3 mAChargeIGIDCurrent sampling resistorsFig. 13a - Basic Gate Charge WaveformFig. 13b - Gate Charge Test Circuit

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Document Number: 91067S-83030-Rev. A, 19-Jan-09

IRF840LC, SiHF840LC

Vishay Siliconix

Peak Diode Recovery dV/dt Test CircuitD.U.T.+Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer-+-+-RG• dV/dt controlled by RG• Driver same type as D.U.T.• ISD controlled by duty factor \"D\"• D.U.T. - device under test+-VDDDriver gate driveP.W.PeriodD = P.W.PeriodVGS = 10 V* D.U.T. ISDwaveformReverserecoverycurrentBody diode forwardcurrentdI/dtD.U.T. VDSwaveformDiode recoverydV/dtVDDRe-appliedvoltageInductor currentBody diode forward dropRipple≤5 %ISD* VGS = 5 V for logic level devicesFig. 14 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for SiliconTechnology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, andreliability data, see www.vishay.com/ppg?91067.

Document Number: 91067S-83030-Rev. A, 19-Jan-09

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Legal Disclaimer Notice

Vishay

Disclaimer

All product specifications and data are subject to change without notice.

Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained hereinor in any other disclosure relating to any product.

Vishay disclaims any and all liability arising out of the use or application of any product described herein or of anyinformation provided herein to the maximum extent permitted by law. The product specifications do not expand orotherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressedtherein, which apply to these products.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by thisdocument or by any conduct of Vishay.

The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unlessotherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in suchapplications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resultingfrom such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regardingproducts designed for such applications.

Product names and markings noted herein may be trademarks of their respective owners.

Document Number: 91000Revision: 18-Jul-08

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